1. Technological Field
This technical disclosure pertains generally to frequency dividers, and more particularly to a micromechanical frequency divider.
2. Background Discussion
Frequency dividers have become essential components in phase-locked loops (PLL), frequency synthesizers, and are otherwise used in myriad applications, from instrumentation to wireless handsets. In a typical frequency synthesizer application, frequency dividers often limit the achievable phase noise performance and contribute a large or even majority portion of the total power consumption. Common digital dividers offer acceptable noise performance, yet their operating power far exceeds what would be permissible for mobile applications. These dividers also provide poor scaling as frequency is increased, for example a power consumption of about 135 mW is typical for a low-noise divide-by-16 device operating at 3 GHz.
Injection-locked oscillator dividers, that lock a free running oscillator to an input signal at a harmonic of the oscillation frequency, have emerged as one possible solution providing a lower power option at high frequency. With operating power below 100 μW even at GHz frequencies, such dividers present a compelling alternative to traditional technologies. While these achievements are impressive, such dividers come at a cost to noise performance due to the active transistors used to sustain oscillation, and still fall short of μW power consumption desired for long-term battery operated applications.
Accordingly, a need exists for frequency division devices which can operate with low power consumption at high frequencies in the MHz to GHz range while adding minimal noise to the divided signal. The technology presented provides high frequency operation at meager power levels while overcoming other shortcomings of previous solutions.